1349 enum { i32e = 32 | 64, BIT = 64 };
1350 static const size_t dummyAddr = (size_t(0x11223344) << 32) | 55667788;
1351 typedef Reg64 NativeReg;
1353 enum { i32e = 32, BIT = 32 };
1354 static const size_t dummyAddr = 0x12345678;
1355 typedef Reg32 NativeReg;
1358 static inline bool isXMM_XMMorMEM(
const Operand& op1,
const Operand& op2)
1360 return op1.isXMM() && (op2.isXMM() || op2.isMEM());
1363 static inline bool isXMMorMMX_MEM(
const Operand& op1,
const Operand& op2)
1365 return (op1.isMMX() && (op2.isMMX() || op2.isMEM())) || isXMM_XMMorMEM(op1, op2);
1368 static inline bool isXMM_MMXorMEM(
const Operand& op1,
const Operand& op2)
1370 return op1.isXMM() && (op2.isMMX() || op2.isMEM());
1373 static inline bool isMMX_XMMorMEM(
const Operand& op1,
const Operand& op2)
1375 return op1.isMMX() && (op2.isXMM() || op2.isMEM());
1378 static inline bool isXMM_REG32orMEM(
const Operand& op1,
const Operand& op2)
1380 return op1.isXMM() && (op2.isREG(i32e) || op2.isMEM());
1383 static inline bool isREG32_XMMorMEM(
const Operand& op1,
const Operand& op2)
1385 return op1.isREG(i32e) && (op2.isXMM() || op2.isMEM());
1388 static inline bool isREG32_REG32orMEM(
const Operand& op1,
const Operand& op2)
1390 return op1.isREG(i32e) && ((op2.isREG(i32e) && op1.getBit() == op2.getBit()) || op2.isMEM());
1395 const Operand *p1 = &op1, *p2 = &op2;
1399 const Address& addr = p2->getAddress();
1400 if (BIT == 64 && addr.is32bit())
db(0x67);
1401 rex = addr.getRex() | p1->getReg().getRex();
1404 rex = op2.getReg().getRex(op1.getReg());
1407 if ((op1.isBit(16) && !op2.isBit(i32e)) || (op2.isBit(16) && !op1.isBit(i32e)))
db(0x66);
1442 T_MUST_EVEX = 1 << 25,
1448 void vex(
const Reg& reg,
const Reg& base,
const Operand *v,
int type,
int code,
bool x =
false)
1450 int w = (type & T_W1) ? 1 : 0;
1451 bool is256 = (type & T_L1) ?
true : (type & T_L0) ? false : reg.isYMM();
1452 bool r = reg.isExtIdx();
1453 bool b = base.isExtIdx();
1454 int idx = v ? v->getIdx() : 0;
1456 uint32 pp = (type & T_66) ? 1 : (type & T_F3) ? 2 : (type & T_F2) ? 3 : 0;
1457 uint32 vvvv = (((~idx) & 15) << 3) | (is256 ? 4 : 0) | pp;
1458 if (!b && !x && !w && (type & T_0F)) {
1459 db(0xC5);
db((
r ? 0 : 0x80) | vvvv);
1461 uint32 mmmm = (type &
T_0F) ? 1 : (type & T_0F38) ? 2 : (type & T_0F3A) ? 3 : 0;
1462 db(0xC4);
db((
r ? 0 : 0x80) | (x ? 0 : 0x40) | (b ? 0 : 0x20) | mmmm);
db((w << 7) | vvvv);
1466 void verifySAE(
const Reg&
r,
int type)
const
1468 if (((type & T_SAE_X) &&
r.isXMM()) || ((type & T_SAE_Y) &&
r.isYMM()) || ((type & T_SAE_Z) &&
r.isZMM()))
return;
1471 void verifyER(
const Reg&
r,
int type)
const
1473 if (((type & T_ER_X) &&
r.isXMM()) || ((type & T_ER_Y) &&
r.isYMM()) || ((type & T_ER_Z) &&
r.isZMM()))
return;
1477 int verifyDuplicate(
int a,
int b,
int c,
int err)
1480 if ((
a > 0 &&
a != v) + (b > 0 && b != v) + (c > 0 && c != v) > 0)
return Error(err);
1483 int evex(
const Reg& reg,
const Reg& base,
const Operand *v,
int type,
int code,
bool x =
false,
bool b =
false,
int aaa = 0,
uint32 VL = 0)
1486 int w = (type & T_EW1) ? 1 : 0;
1487 uint32 mm = (type &
T_0F) ? 1 : (type & T_0F38) ? 2 : (type & T_0F3A) ? 3 : 0;
1488 uint32 pp = (type & T_66) ? 1 : (type & T_F3) ? 2 : (type & T_F2) ? 3 : 0;
1490 int idx = v ? v->getIdx() : 0;
1493 bool R = !reg.isExtIdx();
1494 bool X = x ? false : !base.isExtIdx2();
1495 bool B = !base.isExtIdx();
1496 bool Rp = !reg.isExtIdx2();
1502 verifySAE(base, type); LL = 0;
1504 verifyER(base, type); LL = rounding - 1;
1508 if (v) VL = (std::max)(VL, v->getBit());
1509 VL = (std::max)((std::max)(reg.getBit(), base.getBit()), VL);
1510 LL = (VL == 512) ? 2 : (VL == 256) ? 1 : 0;
1512 disp8N = (type & T_B32) ? 4 : 8;
1513 }
else if (type & T_DUP) {
1514 disp8N = VL == 128 ? 8 : VL == 256 ? 32 : 64;
1516 if ((type & (T_NX_MASK | T_N_VL)) == 0) {
1517 type |= T_N16 | T_N_VL;
1519 int low = type & T_NX_MASK;
1521 disp8N = 1 << (low - 1);
1522 if (type & T_N_VL) disp8N *= (VL == 512 ? 4 : VL == 256 ? 2 : 1);
1526 bool Vp = !(v ? v->isExtIdx2() : 0);
1527 bool z = reg.hasZero() || base.hasZero() || (v ? v->hasZero() :
false);
1530 db((
R ? 0x80 : 0) | (
X ? 0x40 : 0) | (
B ? 0x20 : 0) | (Rp ? 0x10 : 0) | (mm & 3));
1531 db((w == 1 ? 0x80 : 0) | ((vvvv & 15) << 3) | 4 | (pp & 3));
1532 db((z ? 0x80 : 0) | ((LL & 3) << 5) | (b ? 0x10 : 0) | (Vp ? 8 : 0) | (
aaa & 7));
1536 void setModRM(
int mod,
int r1,
int r2)
1538 db(
static_cast<uint8>((mod << 6) | ((r1 & 7) << 3) | (r2 & 7)));
1540 void setSIB(
const RegExp& e,
int reg,
int disp8N = 0)
1542 size_t disp64 = e.getDisp();
1544 size_t high = disp64 >> 32;
1548 const Reg& base = e.getBase();
1549 const Reg& index = e.getIndex();
1550 const int baseIdx = base.getIdx();
1551 const int baseBit = base.getBit();
1552 const int indexBit = index.getBit();
1554 mod00 = 0, mod01 = 1, mod10 = 2
1557 if (!baseBit || ((baseIdx & 7) !=
Operand::EBP && disp == 0)) {
1573 const int newBaseIdx = baseBit ? (baseIdx & 7) :
Operand::EBP;
1577 if (!baseBit && !indexBit) hasSIB =
true;
1582 const int idx = indexBit ? (index.getIdx() & 7) :
Operand::ESP;
1583 const int scale = e.getScale();
1584 const int SS = (scale == 8) ? 3 : (scale == 4) ? 2 : (scale == 2) ? 1 : 0;
1585 setModRM(SS, idx, newBaseIdx);
1587 setModRM(mod, reg, newBaseIdx);
1591 }
else if (mod == mod10 || (mod == mod00 && !baseBit)) {
1596 bool isInDisp16(
uint32 x)
const {
return 0xFFFF8000 <= x || x <= 0x7FFF; }
1597 void opModR(
const Reg& reg1,
const Reg& reg2,
int code0,
int code1 =
NONE,
int code2 =
NONE)
1603 void opModM(
const Address& addr,
const Reg& reg,
int code0,
int code1 =
NONE,
int code2 =
NONE,
int immSize = 0)
1610 void opMIB(
const Address& addr,
const Reg& reg,
int code0,
int code1)
1623 const int shortJmpSize = 2;
1624 const int longHeaderSize = longPref ? 2 : 1;
1625 const int longJmpSize = longHeaderSize + 4;
1627 db(shortCode);
db(disp - shortJmpSize);
1630 if (longPref)
db(longPref);
1631 db(longCode);
dd(disp - longJmpSize);
1645 if (longPref)
db(longPref);
1660 if (longPref)
db(longPref);
1672 void opAddr(
const Address &addr,
int reg,
int immSize = 0,
int disp8N = 0)
1677 setModRM(0, reg, 5);
1696 opModM(
op.getAddress(), reg.
getReg(), 0x0F, preCode, code, (imm8 !=
NONE) ? 1 : 0);
1698 opModR(reg.
getReg(),
op.getReg(), 0x0F, preCode, code);
1702 void opMMX_IMM(
const Mmx& mmx,
int imm8,
int code,
int ext)
1710 opGen(mmx,
op, code, mmx.
isXMM() ? pref :
NONE, isXMMorMMX_MEM, imm8, preCode);
1723 void opExt(
const Operand&
op,
const Mmx& mmx,
int code,
int imm,
bool hasMMX2 =
false)
1725 if (hasMMX2 &&
op.isREG(i32e)) {
1727 opModR(
op.getReg(), mmx, 0x0F, 0xC5);
db(imm);
1729 opGen(mmx,
op, code, 0x66, isXMM_REG32orMEM, imm, 0x3A);
1732 void opR_ModM(
const Operand&
op,
int bit,
int ext,
int code0,
int code1 =
NONE,
int code2 =
NONE,
bool disableRex =
false,
int immSize = 0)
1735 if (disableRex && opBit == 64) opBit = 32;
1747 opR_ModM(
op, 0, ext, (0xC0 | ((imm == 1 ? 1 : 0) << 4)),
NONE,
NONE,
false, (imm != 1) ? 1 : 0);
1753 opR_ModM(
op, 0, ext, 0xD2);
1755 void opModRM(
const Operand& op1,
const Operand& op2,
bool condR,
bool condM,
int code0,
int code1 =
NONE,
int code2 =
NONE,
int immSize = 0)
1768 opModRM(reg,
op, (
op.isREG(16 | i32e) &&
op.getBit() == reg.
getBit()),
op.isMEM() && (reg.
isREG(16 | i32e)), 0x0F, code | (_cl ? 1 : 0),
NONE, _cl ? 0 : 1);
1785 if (
op.isBit(8)) immBit = 8;
1787 if (
op.isBit(32|64) && immBit == 16) immBit = 32;
1788 if (
op.isREG() &&
op.getIdx() == 0 && (
op.getBit() == immBit || (
op.isBit(64) && immBit == 32))) {
1790 db(code | 4 | (immBit == 8 ? 0 : 1));
1792 int tmp = immBit < (std::min)(
op.getBit(), 32U) ? 2 : 0;
1817 if (
op.getReg().getIdx() >= 8)
db(0x41);
1832 int mov_imm(
const Reg& reg,
size_t imm)
1836 int code = 0xB0 | ((
bit == 8 ? 0 : 1) << 3);
1837 if (
bit == 64 && (imm & ~
size_t(0xffffffffu)) == 0) {
1852 void putL_inner(
T&
label,
bool relative =
false,
size_t disp = 0)
1854 const int jmpSize = relative ? 4 : (int)
sizeof(
size_t);
1880 opModRM(reg,
op, cond &&
op.isREG(), cond &&
op.isMEM(), 0x0F, code | w);
1887 if (m64ext && addr.
isBit(64)) ext = m64ext;
1924 disp8N = evex(
r, base, p1, type, code, x, b,
aaa, VL);
1926 vex(
r, base, p1, type, code, x);
1928 opAddr(addr,
r.getIdx(), (imm8 !=
NONE) ? 1 : 0, disp8N);
1931 if ((type & T_MUST_EVEX) ||
r.hasEvex() || (p1 && p1->
hasEvex()) || base.hasEvex()) {
1932 evex(
r, base, p1, type, code);
1934 vex(
r, base, p1, type, code);
1936 setModRM(3,
r.getIdx(), base.getIdx());
1947 const unsigned int bit =
r.getBit();
1949 type |= (
bit == 64) ? T_W1 : T_W0;
1950 opVex(
r, p1, *p2, type, code, imm8);
1954 const Xmm *x2 =
static_cast<const Xmm*
>(&op1);
1962 opVex(x1, x2, *
op, type, code0, imm8);
1964 void opAVX_K_X_XM(
const Opmask& k,
const Xmm& x2,
const Operand& op3,
int type,
int code0,
int imm8 =
NONE)
1967 opVex(k, &x2, op3, type, code0, imm8);
1975 void checkCvt2(
const Xmm& x,
const Operand&
op)
const
1979 void opCvt2(
const Xmm& x,
const Operand&
op,
int type,
int code)
1983 opVex(x.copyAndSetKind(kind), &
xm0,
op, type, code);
1985 void opCvt3(
const Xmm& x1,
const Xmm& x2,
const Operand&
op,
int type,
int type64,
int type32,
uint8 code)
1990 opVex(x1, &x2, *
p, type | (
op.isBit(64) ? type64 : type32), code);
1992 const Xmm& cvtIdx0(
const Operand& x)
const
1997 void opAVX_X_XM_IMM(
const Xmm& x,
const Operand&
op,
int type,
int code,
int imm8 =
NONE)
1999 opAVX_X_X_XM(x, cvtIdx0(x),
op, type, code, imm8);
2005 bool is16bit = reg.isREG(16) && (
op.isREG(16) ||
op.isMEM());
2007 if (is16bit)
db(0x66);
2008 db(pref); opModRM(reg.changeBit(i32e == 32 ? 32 : reg.getBit()),
op,
op.isREG(),
true, code0, code1);
2010 void opGather(
const Xmm& x1,
const Address& addr,
const Xmm& x2,
int type,
uint8 code,
int mode)
2012 const RegExp& regExp = addr.getRegExp();
2014 const int y_vx_y = 0;
2015 const int y_vy_y = 1;
2017 const bool isAddrYMM = regExp.getIndex().getBit() == 256;
2018 if (!x1.isXMM() || isAddrYMM || !x2.isXMM()) {
2020 if (mode == y_vx_y) {
2021 isOK = x1.isYMM() && !isAddrYMM && x2.isYMM();
2022 }
else if (mode == y_vy_y) {
2023 isOK = x1.isYMM() && isAddrYMM && x2.isYMM();
2025 isOK = !x1.isYMM() && isAddrYMM && !x2.isYMM();
2030 opAVX_X_X_XM(isAddrYMM ? Ymm(x1.getIdx()) : x1, isAddrYMM ? Ymm(x2.getIdx()) : x2, addr, type | T_YMM, code);
2037 void checkGather2(
const Xmm& x1,
const Reg& x2,
int mode)
const
2039 if (x1.isXMM() && x2.isXMM())
return;
2041 case xx_yy_zz:
if ((x1.isYMM() && x2.isYMM()) || (x1.isZMM() && x2.isZMM()))
return;
2043 case xx_yx_zy:
if ((x1.isYMM() && x2.isXMM()) || (x1.isZMM() && x2.isYMM()))
return;
2045 case xx_xy_yz:
if ((x1.isXMM() && x2.isYMM()) || (x1.isYMM() && x2.isZMM()))
return;
2050 void opGather2(
const Xmm& x,
const Address& addr,
int type,
uint8 code,
int mode)
2053 checkGather2(x, addr.getRegExp().getIndex(), mode);
2055 opVex(x, 0, addr, type, code);
2061 void opVmov(
const Operand&
op,
const Xmm& x,
int type,
uint8 code,
bool mode)
2068 opVex(x, 0,
op, type, code);
2070 void opGatherFetch(
const Address& addr,
const Xmm& x,
int type,
uint8 code,
Operand::Kind kind)
2075 opVex(x, 0, addr, type, code);
2098 const Reg64 rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi, r8, r9, r10, r11, r12, r13, r14, r15;
2099 const Reg32 r8d, r9d, r10d, r11d, r12d, r13d, r14d, r15d;
2100 const Reg16 r8w, r9w, r10w, r11w, r12w, r13w, r14w, r15w;
2101 const Reg8 r8b, r9b, r10b, r11b, r12b, r13b, r14b, r15b;
2102 const Reg8 spl, bpl, sil, dil;
2103 const Xmm xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15;
2104 const Xmm xmm16, xmm17, xmm18, xmm19, xmm20, xmm21, xmm22, xmm23;
2105 const Xmm xmm24, xmm25, xmm26, xmm27, xmm28, xmm29, xmm30, xmm31;
2106 const Ymm ymm8, ymm9, ymm10, ymm11, ymm12, ymm13, ymm14, ymm15;
2107 const Ymm ymm16, ymm17, ymm18, ymm19, ymm20, ymm21, ymm22, ymm23;
2108 const Ymm ymm24, ymm25, ymm26, ymm27, ymm28, ymm29, ymm30, ymm31;
2109 const Zmm zmm8, zmm9, zmm10, zmm11, zmm12, zmm13, zmm14, zmm15;
2110 const Zmm zmm16, zmm17, zmm18, zmm19, zmm20, zmm21, zmm22, zmm23;
2111 const Zmm zmm24, zmm25, zmm26, zmm27, zmm28, zmm29, zmm30, zmm31;
2112 const Xmm &xm8, &xm9, &xm10, &xm11, &xm12, &xm13, &xm14, &xm15;
2113 const Xmm &xm16, &xm17, &xm18, &xm19, &xm20, &xm21, &xm22, &xm23;
2114 const Xmm &xm24, &xm25, &xm26, &xm27, &xm28, &xm29, &xm30, &xm31;
2115 const Ymm &ym8, &ym9, &ym10, &ym11, &ym12, &ym13, &ym14, &ym15;
2116 const Ymm &ym16, &ym17, &ym18, &ym19, &ym20, &ym21, &ym22, &ym23;
2117 const Ymm &ym24, &ym25, &ym26, &ym27, &ym28, &ym29, &ym30, &ym31;
2118 const Zmm &zm8, &zm9, &zm10, &zm11, &zm12, &zm13, &zm14, &zm15;
2119 const Zmm &zm16, &zm17, &zm18, &zm19, &zm20, &zm21, &zm22, &zm23;
2120 const Zmm &zm24, &zm25, &zm26, &zm27, &zm28, &zm29, &zm30, &zm31;
2123#ifndef XBYAK_DISABLE_SEGMENT
2156#ifdef XBYAK_VARIADIC_TEMPLATE
2157 template<
class Ret,
class... Params>
2164 opModRM(reg,
op,
op.isREG() && (
op.getKind() == reg.
getKind()),
op.isMEM(), 0x84);
2168 verifyMemHasSize(
op);
2169 int immSize = (std::min)(
op.getBit() / 8, 4U);
2170 if (
op.isREG() &&
op.getIdx() == 0) {
2172 db(0xA8 | (
op.isBit(8) ? 0 : 1));
2174 opR_ModM(
op, 0, 0, 0xF6,
NONE,
NONE,
false, immSize);
2180 opModRM(reg,
op,
op.isREG() && (reg.
getKind() ==
op.getKind()),
op.isMEM(), 0x0F, 0xAF);
2185 int immSize =
s ? 1 : reg.
isREG(16) ? 2 : 4;
2195 }
else if (af.
bit_ == 16 && isInDisp16(imm)) {
2196 db(0x66);
db(0x68);
dw(imm);
2238 db(code | (reg->
isBit(8) ? 0 : 1));
2243 opRM_RM(reg1, reg2, 0x88);
2249 const int size = mov_imm(
op.getReg(), imm);
2251 }
else if (
op.isMEM()) {
2252 verifyMemHasSize(
op);
2253 int immSize =
op.getBit() / 8;
2262 db(
static_cast<uint32>(imm), immSize);
2273 mov_imm(reg, dummyAddr);
2278 mov_imm(reg, dummyAddr);
2283 const Operand *p1 = &op1, *p2 = &op2;
2284 if (p1->
isMEM() || (p2->isREG(16 | i32e) && p2->getIdx() == 0)) {
2285 p1 = &op2; p2 = &op1;
2288 if (p2->isREG() && (p1->
isREG(16 | i32e) && p1->
getIdx() == 0)
2290 && (p2->getIdx() != 0 || !p1->
isREG(32))
2293 rex(*p2, *p1);
db(0x90 | (p2->getIdx() & 7));
2296 opModRM(*p1, *p2, (p1->
isREG() && p2->isREG() && (p1->
getBit() == p2->getBit())), p2->
isMEM(), 0x86 | (p1->
isBit(8) ? 0 : 1));
2299#ifndef XBYAK_DISABLE_SEGMENT
2345 opModRM(
Reg8(seg.
getIdx()),
op.isREG(16|i32e) ?
static_cast<const Operand&
>(
op.getReg().cvt32()) :
op,
op.isREG(16|i32e),
op.isMEM(), 0x8E);
2352 :
CodeArray(maxSize, userPtr, allocator)
2373 , rax(
Operand::
RAX), rcx(
Operand::RCX), rdx(
Operand::RDX), rbx(
Operand::RBX), rsp(
Operand::RSP), rbp(
Operand::RBP), rsi(
Operand::RSI), rdi(
Operand::RDI), r8(
Operand::R8), r9(
Operand::R9), r10(
Operand::R10), r11(
Operand::R11), r12(
Operand::R12), r13(
Operand::R13), r14(
Operand::R14), r15(
Operand::R15)
2374 , r8d(8), r9d(9), r10d(10), r11d(11), r12d(12), r13d(13), r14d(14), r15d(15)
2375 , r8w(8), r9w(9), r10w(10), r11w(11), r12w(12), r13w(13), r14w(14), r15w(15)
2376 , r8b(8), r9b(9), r10b(10), r11b(11), r12b(12), r13b(13), r14b(14), r15b(15)
2378 , xmm8(8), xmm9(9), xmm10(10), xmm11(11), xmm12(12), xmm13(13), xmm14(14), xmm15(15)
2379 , xmm16(16), xmm17(17), xmm18(18), xmm19(19), xmm20(20), xmm21(21), xmm22(22), xmm23(23)
2380 , xmm24(24), xmm25(25), xmm26(26), xmm27(27), xmm28(28), xmm29(29), xmm30(30), xmm31(31)
2381 , ymm8(8), ymm9(9), ymm10(10), ymm11(11), ymm12(12), ymm13(13), ymm14(14), ymm15(15)
2382 , ymm16(16), ymm17(17), ymm18(18), ymm19(19), ymm20(20), ymm21(21), ymm22(22), ymm23(23)
2383 , ymm24(24), ymm25(25), ymm26(26), ymm27(27), ymm28(28), ymm29(29), ymm30(30), ymm31(31)
2384 , zmm8(8), zmm9(9), zmm10(10), zmm11(11), zmm12(12), zmm13(13), zmm14(14), zmm15(15)
2385 , zmm16(16), zmm17(17), zmm18(18), zmm19(19), zmm20(20), zmm21(21), zmm22(22), zmm23(23)
2386 , zmm24(24), zmm25(25), zmm26(26), zmm27(27), zmm28(28), zmm29(29), zmm30(30), zmm31(31)
2388 , xm8(xmm8), xm9(xmm9), xm10(xmm10), xm11(xmm11), xm12(xmm12), xm13(xmm13), xm14(xmm14), xm15(xmm15)
2389 , xm16(xmm16), xm17(xmm17), xm18(xmm18), xm19(xmm19), xm20(xmm20), xm21(xmm21), xm22(xmm22), xm23(xmm23)
2390 , xm24(xmm24), xm25(xmm25), xm26(xmm26), xm27(xmm27), xm28(xmm28), xm29(xmm29), xm30(xmm30), xm31(xmm31)
2391 , ym8(ymm8), ym9(ymm9), ym10(ymm10), ym11(ymm11), ym12(ymm12), ym13(ymm13), ym14(ymm14), ym15(ymm15)
2392 , ym16(ymm16), ym17(ymm17), ym18(ymm18), ym19(ymm19), ym20(ymm20), ym21(ymm21), ym22(ymm22), ym23(ymm23)
2393 , ym24(ymm24), ym25(ymm25), ym26(ymm26), ym27(ymm27), ym28(ymm28), ym29(ymm29), ym30(ymm30), ym31(ymm31)
2394 , zm8(zmm8), zm9(zmm9), zm10(zmm10), zm11(zmm11), zm12(zmm12), zm13(zmm13), zm14(zmm14), zm15(zmm15)
2395 , zm16(zmm16), zm17(zmm17), zm18(zmm18), zm19(zmm19), zm20(zmm20), zm21(zmm21), zm22(zmm22), zm23(zmm23)
2396 , zm24(zmm24), zm25(zmm25), zm26(zmm26), zm27(zmm27), zm28(zmm28), zm29(zmm29), zm30(zmm30), zm31(zmm31)
2399#ifndef XBYAK_DISABLE_SEGMENT
2403 labelMgr_.
set(
this);
2409 labelMgr_.
set(
this);
2422 void dump(
bool doClear =
true)
2425 if (doClear)
size_ = 0;
2429#ifdef XBYAK_UNDEF_JNL
2436 void nop(
size_t size = 1,
bool useMultiByteNop =
true)
2438 if (!useMultiByteNop) {
2439 for (
size_t i = 0; i < size; i++) {
2450 static const uint8 nopTbl[9][9] = {
2454 {0x0F, 0x1F, 0x40, 0x00},
2455 {0x0F, 0x1F, 0x44, 0x00, 0x00},
2456 {0x66, 0x0F, 0x1F, 0x44, 0x00, 0x00},
2457 {0x0F, 0x1F, 0x80, 0x00, 0x00, 0x00, 0x00},
2458 {0x0F, 0x1F, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00},
2459 {0x66, 0x0F, 0x1F, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00},
2461 const size_t n =
sizeof(nopTbl) /
sizeof(nopTbl[0]);
2463 size_t len = (std::min)(n, size);
2470#ifndef XBYAK_DONT_READ_LIST
2475 void align(
size_t x = 16,
bool useMultiByteNop =
true)
2479 if (
isAutoGrow() && x > inner::ALIGN_PAGE_SIZE) fprintf(stderr,
"warning:autoGrow mode does not support %d align\n", (
int)x);
2480 size_t remain = size_t(
getCurr()) % x;
2482 nop(x - remain, useMultiByteNop);
2504static const Reg64 rax(Operand::RAX), rcx(Operand::RCX), rdx(Operand::RDX), rbx(Operand::RBX), rsp(Operand::RSP), rbp(Operand::RBP), rsi(Operand::RSI), rdi(Operand::RDI), r8(Operand::R8), r9(Operand::R9), r10(Operand::R10), r11(Operand::R11), r12(Operand::R12), r13(Operand::R13), r14(Operand::R14), r15(Operand::R15);
2505static const Reg32 r8d(8), r9d(9), r10d(10), r11d(11), r12d(12), r13d(13), r14d(14), r15d(15);
2506static const Reg16 r8w(8), r9w(9), r10w(10), r11w(11), r12w(12), r13w(13), r14w(14), r15w(15);
2507static const Reg8 r8b(8), r9b(9), r10b(10), r11b(11), r12b(12), r13b(13), r14b(14), r15b(15), spl(Operand::SPL,
true), bpl(Operand::BPL,
true), sil(Operand::SIL,
true), dil(Operand::DIL,
true);
2508static const Xmm xmm8(8), xmm9(9), xmm10(10), xmm11(11), xmm12(12), xmm13(13), xmm14(14), xmm15(15);
2509static const Xmm xmm16(16), xmm17(17), xmm18(18), xmm19(19), xmm20(20), xmm21(21), xmm22(22), xmm23(23);
2510static const Xmm xmm24(24), xmm25(25), xmm26(26), xmm27(27), xmm28(28), xmm29(29), xmm30(30), xmm31(31);
2511static const Ymm ymm8(8), ymm9(9), ymm10(10), ymm11(11), ymm12(12), ymm13(13), ymm14(14), ymm15(15);
2512static const Ymm ymm16(16), ymm17(17), ymm18(18), ymm19(19), ymm20(20), ymm21(21), ymm22(22), ymm23(23);
2513static const Ymm ymm24(24), ymm25(25), ymm26(26), ymm27(27), ymm28(28), ymm29(29), ymm30(30), ymm31(31);
2514static const Zmm zmm8(8), zmm9(9), zmm10(10), zmm11(11), zmm12(12), zmm13(13), zmm14(14), zmm15(15);
2515static const Zmm zmm16(16), zmm17(17), zmm18(18), zmm19(19), zmm20(20), zmm21(21), zmm22(22), zmm23(23);
2516static const Zmm zmm24(24), zmm25(25), zmm26(26), zmm27(27), zmm28(28), zmm29(29), zmm30(30), zmm31(31);
2517static const RegRip rip;
2519#ifndef XBYAK_DISABLE_SEGMENT